Memory map: Difference between revisions
Created page with "Category:ATW800/2 == This is the ATW800/2 memory-map as of April 2025 == abc" |
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[[Category:ATW800/2]] | [[Category:ATW800/2]] | ||
== This is the ATW800/2 memory-map | == This is the ATW800/2 memory-map == | ||
{| class="wikitable" | |||
|+ Caption text | |||
|- | |||
! ATW800/2 !! Mega-ST !! Mega-STe !! TT | |||
|- | |||
| VidMem || 0xFEC00000|| 0xFEA00000|| 0xFEC00000 | |||
|- | |||
| SharedMem || 0xFEDF4000|| 0xFEBF4000|| 0xFEDF4000 | |||
|- | |||
| ATWinfo || 0xFEDFDC00|| 0xFEBFDC00|| 0xFEDFDC00 | |||
|- | |||
| CLUT shadow|| 0xFEDFDE00|| 0xFEBFDE00|| 0xFEDFDE00 | |||
|- | |||
| VDI caches || 0xFEDFE000|| Exa0xFEBFE000ple || 0xFEDFE000 | |||
|- | |||
| || || || | |||
|- | |||
| FPGA LUT|| 0xFEDFF000|| 0xFEBFF000|| 0xFEDFF000 | |||
|- | |||
| FPGA Info|| 0xFEDFF200|| 0xFEBFF200|| 0xFEDFF200 | |||
|- | |||
| FPGA VTG|| 0xFEDFF800|| 0xFEBFF800|| 0xFEDFF800 | |||
|- | |||
| FPGA Blit|| 0xFEDFF900|| 0xFEBFF900|| 0xFEDFF900 | |||
|- | |||
| FPGA link|| 0xFEDFFAC0|| 0xFEBFFAC0|| 0xFEDFFAC0 | |||
|- | |||
| || || || | |||
|- | |||
| C011 Link|| 0xFEFFFAC0|| 0xFEBFFA80|| 0xFEFFFAC0 | |||
|- | |||
| CPLD version|| 0xFEFFFAD8|| 0xFEBFFA98|| 0xFEFFFAD8 | |||
|} | |||
Revision as of 11:07, 9 April 2025
This is the ATW800/2 memory-map
| ATW800/2 | Mega-ST | Mega-STe | TT |
|---|---|---|---|
| VidMem | 0xFEC00000 | 0xFEA00000 | 0xFEC00000 |
| SharedMem | 0xFEDF4000 | 0xFEBF4000 | 0xFEDF4000 |
| ATWinfo | 0xFEDFDC00 | 0xFEBFDC00 | 0xFEDFDC00 |
| CLUT shadow | 0xFEDFDE00 | 0xFEBFDE00 | 0xFEDFDE00 |
| VDI caches | 0xFEDFE000 | Exa0xFEBFE000ple | 0xFEDFE000 |
| FPGA LUT | 0xFEDFF000 | 0xFEBFF000 | 0xFEDFF000 |
| FPGA Info | 0xFEDFF200 | 0xFEBFF200 | 0xFEDFF200 |
| FPGA VTG | 0xFEDFF800 | 0xFEBFF800 | 0xFEDFF800 |
| FPGA Blit | 0xFEDFF900 | 0xFEBFF900 | 0xFEDFF900 |
| FPGA link | 0xFEDFFAC0 | 0xFEBFFAC0 | 0xFEDFFAC0 |
| C011 Link | 0xFEFFFAC0 | 0xFEBFFA80 | 0xFEFFFAC0 |
| CPLD version | 0xFEFFFAD8 | 0xFEBFFA98 | 0xFEFFFAD8 |